IDT82V2048SBBG

Product Summary

The IDT82V2048SBBG is a single chip, 8-channel T1/E1 short haul PCM transceiver with a reference clock of 1.544 MHz (T1) or 2.048 MHz (E1). The IDT82V2048SBBG contains 8 transmitters and 8 receivers. The IDT82V2048SBBG offers hardware control mode and software control mode. Software control mode works with either serial host interface or parallel host interface. The latter works via an Intel/Motorola compatible 8-bit parallel interface for both multiplexed or non-multiplexed applications. Hardware control mode uses multiplexed pins to select different operation modes when the host interface is not available to the device.

Parametrics

IDT82V2048SBBG absolute maximum ratings: (1)VIL Input Low Level Voltage: 0.8V; (2)VIH Input High Voltage: 2.0V; (3)VOL Output Low level Voltage(1) (Iout = 1.6mA): 0.4V; (4)VOH Output High level Voltage(1) (Iout = 400μA): 2.4 to VDDIO V; (5)VMA Analog Input Quiescent Voltage (RTIPn/RRINGn pin while floating) 1.33 to 1.47V; (6)IH Input High Level Current (MODE2, JAS and LPn pin): 50μA; (7)IL Input Low Level Current (MODE2, JAS and LPn pin): 50μA; (8)II Input Leakage Current TMS, TDI and TRST pins All other digital input pins -10μA; (9)IZL High-Z Leakage Current: -10 to 10μA; (10)ZOH Output High-Z on TTIPn pins and TRINGn pins: 150kΩ.

Features

IDT82V2048SBBG features: (1)Fully integrated octal T1/E1 short haul line interface which supports 100 Ω T1 twisted pair, 120 Ω E1 twisted pair and 75 Ω E1 coaxial applications; (2)Optional Single Ended receive termination LIU on RTIPn/RRINGn for 75 Ω E1 coaxial applications; (3)Selectable Single Rail mode or Dual Rail mode and AMI or B8ZS/HDB3 encoder/decoder; (4)Built-in transmit pre-equalization meets G.703 & T1.102; (5)Selectable transmit/receive jitter attenuator meets ETSI CTR12/; (6)13, ITU G.736, G.742, G.823 and AT&T Pub 62411 specifications; (7)SONET/SDH optimized jitter attenuator meets ITU G.783 mapping jitter specification; (8)Digital/Analog LOS detector meets ITU G.775, ETS 300 233 and T1.231; (9)ITU G.772 non-intrusive monitoring for in-service testing for any one of channel 1 to channel 7; (10)Low impedance transmit drivers with high-Z; (11)Selectable hardware and parallel/serial host interface; (12)Local, Remote and Inband Loopback test functions; (13)Hitless Protection Switching (HPS) for 1 to 1 protection without; (14)relays; (15)JTAG boundary scan for board test; (16)3.3 V supply with 5 V tolerant I/O; (17)Low power consumption; (18)Operating temperature range: -40℃ to +85℃; (19)Available in 144-pin Thin Quad Flat Pack (TQFP) and 160 pin Plastic Ball Grid Array (PBGA) packages.

Diagrams