IDT72V275L

Product Summary

The IDT72V275L is an exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memory with clocked read and write controls. The IDT72V275L offers numerous improvements over previous SuperSync FIFOs, including the following: (1)The limitation of the frequency of one clock input with respect to the other has been removed. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. (2)The period required by the retransmit operation is now fixed and short. (3)The first word data latency period, from the time the first word is written to an empty FIFO to the time it can be read, is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.

Parametrics

IDT72V275L absolute maximum ratings: (1)VTERM Terminal Voltage with respect to GND: –0.5 to +4.6V; (2)TSTG Storage Temperature: –55 to +125℃; (3)IOUT DC Output Current:–50 to +50mA.

Features

IDT72V275L features: (1)Choose among the following memory organizations; (2)IDT72V275 32,768 x 18; (3)IDT72V285 65,536 x 18; (4)Pin-compatible with the IDT72V255/72V265 SuperSync FIFOs; (5)10ns read/write cycle time (6.5ns access time); (6)Fixed, low first word data latency time; (7)Auto power down minimizes standby power consumption; (8)Master Reset clears entire FIFO; (9)Partial Reset clears data, but retains programmable settings; (10)Retransmit operation with fixed, low first word data latency time; (11)Empty, Full and Half-Full flags signal FIFO status; (12)Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two preselected offsets; (13)Program partial flags by either serial or parallel means; (14)Select IDT Standard timing (using EF and FF flags) or First Word; (15)Fall Through timing (using OR and IR flags); (16)Output enable puts data outputs into high impedance state; (17)Easily expandable in depth and width; (18)Independent Read and Write clocks (permit reading and writing simultaneously); (19)Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64 pin Slim Thin Quad Flat Pack (STQFP); (20)High-performance submicron CMOS technology; (21)Industrial temperature range (-40℃ to +85℃) is available; (22)Green parts are available, see ordering information.

Diagrams