Product Summary
The IDT71T75602S200BG is a 2.5V high-speed 18,874,368-bit (18 Megabit) synchronous SRAM. The IDT71T75602S200BG is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, the IDT71T75602S200BG have been given the name ZBTTM, or Zero Bus Turnaround. Address and control signals are applied to the SRAM during one clock cycle, and two cycles later the associated data cycle occurs, be it read or write.
Parametrics
IDT71T75602S200BG absolute maximum ratings: (1)VTERM(2) Terminal Voltage with Respect to GND: -0.5 to +3.6V; (2)VTERM(3,6) Terminal Voltage with Respect to GND: -0.5 to VDD V; (3)VTERM(4,6) Terminal Voltage with Respect to GND: -0.5 to VDD +0.5V; (4)VTERM(5,6) Terminal Voltage with Respect to GND: -0.5 to VDDQ +0.5V; (5)TA(7) Operating Ambient Temperature: 0 to +70℃; (6)TBIAS Temperature Under Bias: -55 to +125℃; (7)TSTG Storage Temperature: -55 to +125℃; (8)PT Power Dissipation: 2.0W; (9)IOUT DC Output Current: 50mA.
Features
IDT71T75602S200BG features: (1)512K x 36, 1M x 18 memory configurations; (2)Supports high performance system speed - 225 MHz (3.0 ns Clock-to-Data Access); (3)ZBTTM Feature - No dead cycles between write and read cycles; (4)Internally synchronized output buffer enable eliminates the need to control OE; (5)Single R/W (READ/WRITE) control pin; (6)Positive clock-edge triggered address, data, and control signal registers for fully pipelined applications; (7)4-word burst capability (interleaved or linear); (8)Individual byte write (BW1 - BW4) control (May tie active); (9)Three chip enables for simple depth expansion; (10)2.5V power supply (±5%); (11)2.5V I/O Supply (VDDQ); (12)Power down controlled by ZZ input; (13)Boundary Scan JTAG Interface (IEEE 1149.1 Compliant); (14)Packaged in a JEDEC standard 100-pin plastic thin quad flatpack (TQFP), 119 ball grid array (BGA).
Diagrams
Image | Part No | Mfg | Description | ![]() |
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![]() IDT71T75602S200BG |
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![]() IC SRAM 18MBIT 200MHZ 119BGA |
![]() Data Sheet |
![]() Negotiable |
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![]() IDT71T75602S200BG8 |
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![]() IC SRAM 18MBIT 200MHZ 119BGA |
![]() Data Sheet |
![]() Negotiable |
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![]() IDT71T75602S200BGGI |
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![]() IC SRAM 18MBIT 200MHZ 119BGA |
![]() Data Sheet |
![]() Negotiable |
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![]() |
![]() IDT71T75602S200BGGI8 |
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![]() IC SRAM 18MBIT 200MHZ 119BGA |
![]() Data Sheet |
![]() Negotiable |
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![]() IDT71T75602S200BGI |
![]() |
![]() IC SRAM 18MBIT 200MHZ 119BGA |
![]() Data Sheet |
![]() Negotiable |
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![]() |
![]() IDT71T75602S200BGI8 |
![]() |
![]() IC SRAM 18MBIT 200MHZ 119BGA |
![]() Data Sheet |
![]() Negotiable |
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